“The CMOS Inverter” as a Comparator in ADC Designs
Analog Integrated Circuits and Signal Processing
CMOS Circuit Design, Layout, and Simulation, Second Edition
CMOS Circuit Design, Layout, and Simulation, Second Edition
An efficient power reduction technique for CMOS flash analog-to-digital converters
Analog Integrated Circuits and Signal Processing
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This paper presents a novel adaptive gain control method for Low Noise Amplifiers (LNAs) at the 5.2 GHz band using a feedback circuit, and operating in the baseband signal frequency. A uniform step variable gain can be implemented using a two-stage LNA based on the cascade topology. The feedback circuit consists of seven functional blocks, each of which has been designed for minimum power consumption. The storage circuit in the feedback circuit is used to store the previous signal magnitude, thus avoiding unnecessary power consumption in the LNA. We simulated the performances of LNA in terms of the gain, IIP3, Noise Figure (NF), stability, and power consumption. The adaptive front-end LNA with the feedback circuit can achieve a variable gain from 11.39 dB to 22.74 dB with excellent noise performance even at a high gain mode. The DC power of the proposed variable gain LNA consumes 5.68---6.75 mW under a 1.8 V supply voltage.