Skeleton automata for FPGAs: reconfiguring without reconstructing
SIGMOD '12 Proceedings of the 2012 ACM SIGMOD International Conference on Management of Data
Pub/Sub on stream: a multi-core based message broker with QoS support
Proceedings of the 6th ACM International Conference on Distributed Event-Based Systems
Less watts, more performance: an intelligent storage engine for data appliances
Proceedings of the 2013 ACM SIGMOD International Conference on Management of Data
Stream-Mode FPGA acceleration of complex pattern trajectory querying
SSTD'13 Proceedings of the 13th international conference on Advances in Spatial and Temporal Databases
XLynx—An FPGA-based XML filter for hybrid XQuery processing
ACM Transactions on Database Systems (TODS) - Invited papers issue
A study on parallelizing XML path filtering using accelerators
ACM Transactions on Embedded Computing Systems (TECS)
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In recent years, XML-based Publish-Subscribe Systems have become popular due to the increased demand of timely event-notification. Users (or subscribers) pose complex profiles on the structure and content of the published messages. If a profile matches the message, the message is forwarded to the interested subscriber. As the amount of published content continues to grow, current software-based systems will not scale. We thus propose a novel architecture to exploit parallelism of twig matching on FPGAs. This approach yields up to three orders of magnitude higher throughput when compared to conventional approaches bound by the sequential aspect of software computing. This paper, presents a novel method for performing unordered holistic twig matching on FPGAs without any false positives, and whose throughput is independent of the complexity of the user queries or the characteristics of the input XML stream. Furthermore, we present experimental comparison of different granularities of twig matching, namely path-based (root-to-leaf) and pair-based (parent-child or ancestor-descendant).We provide comprehensive experiments that compare the throughput, area utilization and the accuracy of matching (percent of false positives) of our holistic, path-based and pair-based FPGA approaches.