Analog circuit design optimization through the particle swarm optimization technique
Analog Integrated Circuits and Signal Processing
Hierarchical Analog/Mixed-Signal Circuit Optimization Under Process Variations and Tuning
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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This paper presents a method for analog design synthesis at circuit-level and pareto front exploration of the design through a combined approach of Simulated Annealing (SA) and Particle Swarm Optimization (PSO). The method consists of dividing the design parameters search in three main parts. The first has the objective of finding the minimal specifications defined by the user through the use of SA and using an aggregate objective function to combine all the design objectives into a single cost function. The second part starts when all the minimal specs are met and it performs a single-objective optimization for each objective in order to obtain a non-exhaustive exploration of the pareto front. The third part applies PSO for multiple objective in order to spread the results and find a more accurate pareto front of the design. This approach allows the designer to have a visual feedback about the trade-offs of the design to a specific topology and technology selection. Results of a folded-cascode opamp circuit-level synthesis using a 0.35 μm technology show this method provides a fast approach to good solutions using SA (considering Gain, UGF, Slew Rate, Consumption, Phase Margin, ICMR, Output Swing and PSRR specifications) and further good pareto front exploration through its connection with the PSO algorithm.