Unifying barrier and point-to-point synchronization in OpenMP with phasers

  • Authors:
  • Jun Shirako;Kamal Sharma;Vivek Sarkar

  • Affiliations:
  • Department of Computer Science, Rice University;Department of Computer Science, Rice University;Department of Computer Science, Rice University

  • Venue:
  • IWOMP'11 Proceedings of the 7th international conference on OpenMP in the Petascale era
  • Year:
  • 2011

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Abstract

OpenMP is a widely used standard for parallel programing on a broad range of SMP systems. In the OpenMP programming model, synchronization points are specified by implicit or explicit barrier operations. However, certain classes of computations such as stencil algorithms need to specify synchronization only among particular tasks/threads so as to support pipeline parallelism with better synchronization efficiency and data locality than wavefront parallelism using all-to-all barriers. In this paper, we propose two new synchronization constructs in the OpenMP programming model, thread-level phasers and iteration level phasers to support various synchronization patterns such as point-to-point synchronizations and sub-group barriers with neighbor threads. Experimental results on three platforms using numerical applications show performance improvements of phasers over OpenMP barriers of up to 1.74× on an 8-core Intel Nehalem system, up to 1.59× on a 16-core Core-2-Quad system and up to 1.44× on a 32-core IBM Power7 system. It is reasonable to expect larger increases on future manycore processors.