Mapping uniform loop nests onto distributed memory architectures

Chain Grouping: A Method for Partitioning Loops onto Mesh-Connected Processor Arrays

IEEE Transactions on Parallel and Distributed Systems

Loop parallelization algorithms

Compiler optimizations for scalable parallel systems

Scheduling Functions for Spatiotemporal Mapping of d-Dimensional Algorithms with Homogeneous Dependences on (d-2)-Dimensional Parallel Architectures

Cybernetics and Systems Analysis

A Method for Parallelizing Algorithms by Vector Scheduling Functions

Programming and Computing Software

How to Optimize Residual Communications?

IPPS '96 Proceedings of the 10th International Parallel Processing Symposium

Systematic Generation of Executing Programs for Processor Elements in Parallel ASIC or FPGA-Based Systems and Their Transformation into VHDL-Descriptions of Processor Element Control Units

PPAM '01 Proceedings of the th International Conference on Parallel Processing and Applied Mathematics-Revised Papers

Automatic data mapping of signal processing applications

ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors

Evaluation of Loop Grouping Methods Based on Orthogonal Projection Spaces

ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing

Code Generation in the Polyhedral Model Is Easier Than You Think

Proceedings of the 13th International Conference on Parallel Architectures and Compilation Techniques

A consistent generation of pipeline parallelism and distribution of operations and data among processors

Programming and Computing Software

Semi-automatic composition of loop transformations for deep parallelism and memory hierarchies

International Journal of Parallel Programming

Polyhedral code generation in the real world

CC'06 Proceedings of the 15th international conference on Compiler Construction