The weakest failure detector to implement a register in asynchronous systems with hybrid communication

  • Authors:
  • Damien Imbs;Michel Raynal

  • Affiliations:
  • IRISA, Université de Rennes 1, France;IUF and IRISA, Université de Rennes 1, France

  • Venue:
  • SSS'11 Proceedings of the 13th international conference on Stabilization, safety, and security of distributed systems
  • Year:
  • 2011

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Abstract

This paper introduces an asynchronous crash-prone hybrid system model. The system is hybrid in the way the processes can communicate. On the one side, a process can send messages to any other process. On another side, the processes are partitioned into clusters and each cluster has its own read/write shared memory. In addition to the model, a main contribution of the paper concerns the implementation of an atomic register in this system model. More precisely, a new failure detector (denoted MΣ) is introduced and it is shown that, when considering the information on failures needed to implement a register, this failure detector is the weakest. To that end, the paper presents an MΣ-based algorithm that builds a register in the considered hybrid system model and shows that it is possible to extract MΣ from any failure detector-based algorithm that implements a register in this model. The paper also (a) shows that MΣ is strictly weaker than Σ (which is the weakest failure detector to implement a register in a classical message-passing system) and (b) presents a necessary and sufficient condition to implement MΣ in a hybrid communication system.