Constructive deterministic PRAM simulation on a mesh-connected computer

Authors:
Andrea Pietracaprina;Geppino Pucci;Jop F. Sibeyn
Affiliations:
Univ. di Padova, Padua, Italy;Univ. di Padova, Padua, Italy;Max-Planck Institut fu¨r Informatik, Saarbru¨cken, Germany
Venue:
SPAA '94 Proceedings of the sixth annual ACM symposium on Parallel algorithms and architectures
Year:
1994

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Abstract

We present a constructive deterministic simulation of a PRAM with n processors and m = n &agr; shared variables, 1 n-node mesh-connected computer where each node hosts a processor and a memory module. At the core of the simulation is a Hierarchical Memory Organization Scheme (HMOS) that governs the distribution of the PRAM variables (each replicated into a number of copies) among the modules. The HMOS consists of a cascade of explicit bipartite graphs whose expansion properties, combined with suitable access and routing protocols, yield a time performance that, for &agr; Wn bound imposed by the network's diameter, and that, for &agr; ≥ 3/2, is a function of &agr; never exceeding On5/8 .