How much (execution) time and energy does my algorithm cost?
XRDS: Crossroads, The ACM Magazine for Students - Scientific Computing
Virtualization for safety-critical, deeply-embedded devices
Proceedings of the 28th Annual ACM Symposium on Applied Computing
Optimal procrastination interval for constrained deadline sporadic tasks upon uniprocessors
Proceedings of the 21st International conference on Real-Time Networks and Systems
A scheduling algorithm to reduce the static energy consumption of multiprocessor real-time systems
Proceedings of the 21st International conference on Real-Time Networks and Systems
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With progressing CMOS technology miniaturization, the leakage power consumption starts to dominate the dynamic power consumption. The recent technology trends have equipped the modern embedded processors with the several sleep states and reduced their overhead (energy/time) of the sleep transition. The dynamic voltage frequency scaling (DVFS) potential to save energy is diminishing due to efficient (low overhead) sleep states and increased static (leakage) power consumption. The state-of-the-art research on static power reduction at system level is based on assumptions that cannot easily be integrated into practical systems. We propose a novel enhanced race-to-halt approach (ERTH) to reduce the overall system energy consumption. The exhaustive simulations demonstrate the effectiveness of our approach showing an improvement of up to 8 % over an existing work.