HALSIM—a very fast SPARC V9 behavioral model

Authors:
David Barach;Jaspal Kohli;John Slice;Marc Spaulding;Rajeev Bharadhwaj;Don Hudson;Cliff Neighbors;Nirmal Saxena;Rolland Crunk
Affiliations:
HAL Computer Systems, Inc. 1315 Dell Ave. Campbell, CA;HAL Computer Systems, Inc. 1315 Dell Ave. Campbell, CA;HAL Computer Systems, Inc. 1315 Dell Ave. Campbell, CA;HAL Computer Systems, Inc. 1315 Dell Ave. Campbell, CA;HAL Computer Systems, Inc. 1315 Dell Ave. Campbell, CA;HAL Computer Systems, Inc. 1315 Dell Ave. Campbell, CA;HAL Computer Systems, Inc. 1315 Dell Ave. Campbell, CA;HAL Computer Systems, Inc. 1315 Dell Ave. Campbell, CA;HAL Computer Systems, Inc. 1315 Dell Ave. Campbell, CA
Venue:
ACM SIGARCH Computer Architecture News - Special issue: panel sessions of the 1991 workshop on multithreaded computers
Year:
1994

Citing 2
Cited 0

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The SPARC architecture manual (version 9)

The SPARC architecture manual (version 9)

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Abstract

This paper describes several implementation techniques used in HAL's 250 KIPS SPARC V9 behavioral model. Beyond presenting the details of our processor model, we describe several areas of innovation: architectural state-vector capture for injection into a gate-level hardware model, using an EDC polynomial-based signature scheme to verify a hardware design; obtaining accurate kernel and user-mode instruction trace data.