Analog Integrated Circuits and Signal Processing
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This paper presents IDEA1, a validated SystemC-based simulator for WSNs. It allows the system-level performance evaluation (e.g., packet transmission and energy consumption) with elaborate models of sensor nodes. IDEA1 uses a clock-based synchronization mechanism to support simulations with cycle accurate communication and approximate time computation. Its accuracy has been validated by a testbed of 9 nodes. The average deviation between the IDEA1 simulations and experimental measurements is 5.9%. The performances of IDEA1 have also been compared with NS-2, one of the most widely used simulators in WSN research. To provide a similar result (deviation less than 5%) at the same abstraction level, the simulation of IDEA1 is 2 times faster than NS-2. Moreover, with the hardware and software co-simulation feature, IDEA1 provides more detailed modeling of sensor nodes than NS-2.