Towards informed swarm verification
NFM'11 Proceedings of the Third international conference on NASA Formal methods
Reliable software development: analysis-aware design
TACAS'11/ETAPS'11 Proceedings of the 17th international conference on Tools and algorithms for the construction and analysis of systems: part of the joint European conferences on theory and practice of software
Parallel nested depth-first searches for LTL model checking
ATVA'11 Proceedings of the 9th international conference on Automated technology for verification and analysis
Proceedings of the 2012 International Symposium on Software Testing and Analysis
ACM SIGSOFT Software Engineering Notes
Improved multi-core nested depth-first search
ATVA'12 Proceedings of the 10th international conference on Automated Technology for Verification and Analysis
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The range of verification problems that can be solved with logic model checking tools has increased significantly in the last few decades. This increase in capability is based on algorithmic advances and new theoretical insights, but it has also benefitted from the steady increase in processing speeds and main memory sizes on standard computers. The steady increase in processing speeds, though, ended when chip-makers started redirecting their efforts to the development of multicore systems. For the near-term future, we can anticipate the appearance of systems with large numbers of CPU cores, but without matching increases in clock-speeds. We will describe a model checking strategy that can allow us to leverage this trend and that allows us to tackle significantly larger problem sizes than before.