Hardware aware algorithm performance and the low power continuous wavelet transform

  • Authors:
  • Alexander J. Casson

  • Affiliations:
  • Imperial College London, London, UK

  • Venue:
  • Proceedings of the 4th International Symposium on Applied Sciences in Biomedical and Communication Technologies
  • Year:
  • 2011

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Abstract

Highly miniaturised, wearable, physiological sensors require algorithms for the automated analysis of the collected signal. To reduce the total sensor power consumption in many situations the automated analysis is best carried on the sensor device itself and this online signal processing needs to be both accurate (in terms of correct detections and false detections) and also be implemented using very low power consumption circuits. However, reducing the circuit power consumption potentially impacts the algorithm performance. Hardware aware algorithms need to take this into account. This paper takes a previously reported 60 pW Continuous Wavelet Transform (CWT) circuit and investigates the impact of this circuit on a CWT-based algorithm for providing real-time EEG data reduction. An analytical model describing the measured variations in CWT response between different microchips is built, and this used in Matlab simulations of the EEG algorithm. Compared to using an ideal CWT stage, the impact of the modelled CWT circuit is negligible, resulting in only a 0.001 reduction in ROC-like performance area.