Scalable DiffServ-over-MPLS traffic engineering with per-flow traffic policing

Authors:
Djakhongir Siradjev;Ivan Gurin;Young-Tak Kim
Affiliations:
Dept. of Information & Communication Engineering, Graduate School, Yeungnam University, Gyeongbook, Korea;Dept. of Information & Communication Engineering, Graduate School, Yeungnam University, Gyeongbook, Korea;Dept. of Information & Communication Engineering, Graduate School, Yeungnam University, Gyeongbook, Korea
Venue:
APNOMS'06 Proceedings of the 9th Asia-Pacific international conference on Network Operations and Management: management of Convergence Networks and Services
Year:
2006

Citing 2
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Abstract

This paper proposes a DiffServ-over-MPLS Traffic Engineering (TE) architecture and describes the implementation of its functional blocks on Intel IXP2400 Network Processor using Intel IXA SDK 4.1 framework. We propose fast and scalable 6-tuple range-match classifier, which allows traffic policing procedures to operate on per-flow level, and a scalable low-jitter Deficit Round Robin (DRR) scheduler that can provide bandwidth guarantees on LSP level. The proposed DiffServ-over-MPLS TE functional blocks have been implemented on Intel IXDP2400 platform for up to 4,096 flows mapped to L-LSPs, and can handle an aggregated traffic rate of 2.4Gbps.