Reliable computation with noisy circuits and decision trees—a general n log n lower bound
SFCS '91 Proceedings of the 32nd annual symposium on Foundations of computer science
Tiny families of functions with random properties: a quality-size trade-off for hashing
Proceedings of the workshop on Randomized algorithms and computation
Fault tolerant circuits and probabilistically checkable proofs
SCT '95 Proceedings of the 10th Annual Structure in Complexity Theory Conference (SCT'95)
Lower Bounds for Linear Locally Decodable Codes and Private Information Retrieval
CCC '02 Proceedings of the 17th IEEE Annual Conference on Computational Complexity
Highly fault-tolerant parallel computation
FOCS '96 Proceedings of the 37th Annual Symposium on Foundations of Computer Science
SFCS '85 Proceedings of the 26th Annual Symposium on Foundations of Computer Science
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We investigate the coded model of fault-tolerant computations introduced by D. Spielman. In this model the input and the output of a computational circuit is treated as words in some error-correcting code. A circuit is said to compute some function correctly if for an input which is a encoded argument of the function, the output, been decoded, is the value of the function on the given argument. We consider two models of faults. In the first one we suppose that an elementary processor at each step can be corrupted with some small probability, and faults of different processors are independent. For this model, we prove that a parallel computation running on n elementary non-faulty processors in time t = poly(n) can be simulated on O(nlogn / log log n) faulty processors in time O(tlog log n). Note that we get a sub-logarithmic blow up of the memory, which cannot be achieved in the classic model of faulty boolean circuit, where the input is not encoded. In the second model, we assume that at each step some fixed fraction of elementary processors can be corrupted by an adversary, who is free to chose these processors arbitrarily. We show that in this model any computation can be made reliable with an exponential blow up of the memory. Our method employs a sort of mixing mappings, which enjoy some properties of expanders. Based on mixing mappings, we implement an effective self-correcting procedure for an array of faulty processors.