Flat counter automata almost everywhere!

  • Authors:
  • Jérôme Leroux;Grégoire Sutre

  • Affiliations:
  • IRISA, Vertecs Project, Rennes, France;LaBRI, CNRS UMR 5800, Talence, France

  • Venue:
  • ATVA'05 Proceedings of the Third international conference on Automated Technology for Verification and Analysis
  • Year:
  • 2005

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Abstract

This paper argues that flatness appears as a central notion in the verification of counter automata. A counter automaton is called flat when its control graph can be “replaced”, equivalently w.r.t. reachability, by another one with no nested loops. From a practical view point, we show that flatness is a necessary and sufficient condition for termination of accelerated symbolic model checking, a generic semi-algorithmic technique implemented in successful tools like Fast, Lash or TReX. From a theoretical view point, we prove that many known semilinear subclasses of counter automata are flat: reversal bounded counter machines, lossy vector addition systems with states, reversible Petri nets, persistent and conflict-free Petri nets, etc. Hence, for these subclasses, the semilinear reachability set can be computed using a uniform accelerated symbolic procedure (whereas previous algorithms were specifically designed for each subclass).