ACM Transactions on Mathematical Software (TOMS)
A set of level 3 basic linear algebra subprograms
ACM Transactions on Mathematical Software (TOMS)
The Journal of Supercomputing
Benchmark Design for Characterization of Balanced High-Performance Architectures
IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
Effective Communication and File-I/O Bandwidth Benchmarks
Proceedings of the 8th European PVM/MPI Users' Group Meeting on Recent Advances in Parallel Virtual Machine and Message Passing Interface
Scientific Application Performance On Leading Scalar and Vector Supercomputering Platforms
International Journal of High Performance Computing Applications
Teraflops Sustained Performance With Real World Applications
International Journal of High Performance Computing Applications
Performance evaluation of supercomputers using HPCC and IMB Benchmarks
Journal of Computer and System Sciences
Block-Based Approach to Solving Linear Systems
ICCS '07 Proceedings of the 7th international conference on Computational Science, Part I: ICCS 2007
Performance evaluation of supercomputers using HPCC and IMB benchmarks
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
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The HPC Challenge benchmark suite (HPCC) was released to analyze the performance of high-performance computing architectures using several kernels to measure different memory and hardware access patterns comprising latency based measurements, memory streaming, inter-process communication and floating point computation. HPCC defines a set of benchmarks augmenting the High Performance Linpack used in the Top500 list. This paper describes the inter-process communication benchmarks of this suite. Based on the effective bandwidth benchmark, a special parallel random and natural ring communication benchmark has been developed for HPCC. Ping-Pong benchmarks on a set of process pairs can be used for further characterization of a system. This paper analyzes first results achieved with HPCC. The focus of this paper is on the balance between computational speed, memory bandwidth, and inter-node communication.