Design and implementation of FPGA based high-performance intrusion detection system

Authors:
Byoung-Koo Kim;Young-Jun Heo;Jin-Tae Oh
Affiliations:
Security Gateway System Team, Electronics and Telecommunications Research Institute, Daejeon, Korea;Security Gateway System Team, Electronics and Telecommunications Research Institute, Daejeon, Korea;Security Gateway System Team, Electronics and Telecommunications Research Institute, Daejeon, Korea
Venue:
ISI'06 Proceedings of the 4th IEEE international conference on Intelligence and Security Informatics
Year:
2006

Citing 2
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Abstract

As network technology presses forward, Gigabit Ethernet has become the actual standard for large network installations. Therefore, it is necessary to research on security analysis mechanism, which is capable to process high traffic volume over the high-speed network. This paper proposes FPGA based high-performance IDS to detect and respond variant attacks on high-speed links. Most of all, It is possible through the pattern matching function and heuristic analysis function that is processed in FPGA Logic. In other words, we focus on the network intrusion detection mechanism applied in high-speed network.