Parallel Packet Switching Using Multiplexors with Virtual Input Queues
LCN '02 Proceedings of the 27th Annual IEEE Conference on Local Computer Networks
Analysis of the parallel packet switch architecture
IEEE/ACM Transactions on Networking (TON)
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This investigation uses an approximate Markov chain to determine whether a sliding window (SW) parallel packet switch (PPS), only operating more slowly than the external line speed, can emulate a first-come first-served (FCFS) output-queued (OQ) packet switch. A new SW packet switching scheme for PPS, which is called SW-PPS, was presented in the authors’ earlier study [1]. The PPS class is characterized by deployment of distributed center-stage switch planes with memory buffers that run slower than the external line speed. Given identical Bernoulli and Bursty data traffic, the proposed SW-PPS provided substantially outperformed typical PPS, in which the dispatch algorithm applies a round-robin method (RR) [1]. This study develops a presented Markov chain model that successfully exhibits throughput, cell delay and cell drop rate. A simulation reveals that the chains are accurate for reasonable network loads. Major findings concerning the presented model are that: (1) the throughput and cell drop rates of a SW-PPS can theoretically emulate those of aFCFS-OQ packet switch when each slower packet switch operates at a rate of around R/K (Eq. 19); and, (2) this investigation also proves the theoretical possibility that the cell delay of a SW-PPS can emulate that of an FCFS-OQ packet switch, when each slower packet switch operates at a rate of about (R/cell delay of FCFS-OQ switch) (Eq. 20).