VLSI architecture for real time edge detection of monochrome video sequences
Proceedings of the Eighth Indian Conference on Computer Vision, Graphics and Image Processing
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With the increasing requirement of processing power in image processing, it is important to provide a real time, low-cost, and high performance platform. This paper presents a general-purpose FPGA-based dynamic reconfigurable platform for image processing. It uses the FPGA's powerful parallel processing architecture to implement the acceleration of the image algorithm. Based on the proposed system level architecture, our system includes different functional modules, such as edge detection and image filtering, which provides the flexibility for the system. According to the different application requirements, this design strategy can dynamic reconfigure the functional modules on line. Its hardware efficiency and software flexibility have been shown by the functional verification of the edge detection and image filtering algorithm on the Virtex-4 development platform.