Neural Acceleration for General-Purpose Approximate Programs
MICRO-45 Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture
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Error tolerance is evolving into a new computing paradigm with further technology scaling, cost constraint, system scalability and emerging applications. Distinguished from defect tolerance and fault tolerance, error tolerance is based on application characteristics and relaxes the constraint of 100 percent functional correctness. From the viewpoint of error tolerance, this paper proposes a framework across multiple layers for fault criticality evaluation. Furthermore, taking an H.264/AVC decoder as an example, fault injection experiments demonstrate that for different functional modules, the faults in them bear different fault criticalities because of their unbalanced effects on applications, the faults in the same module also have diverse fault criticalities. The information that which faults are most critical can aid in test for yield and design for cost-effective fault tolerance. Error control techniques can be used to suppress error propagation and make more faults acceptable.