Positive Davio-based synthesis algorithm for reversible logic

  • Authors:

  • Yu Pang;Shaoquan Wang;Zhilong He;Jinzhao Lin;Sayeeda Sultana;Katarzyna Radecka

  • Affiliations:

  • College of Electronic Engineering, Chongqing University of Posts and Telecommunications, China;College of Electronic Engineering, Chongqing University of Posts and Telecommunications, China;College of Electronic Engineering, Chongqing University of Posts and Telecommunications, China;College of Electronic Engineering, Chongqing University of Posts and Telecommunications, China;Dept. of Electrical & Computer Engineering, McGill University, Montreal, Canada;Dept. of Electrical & Computer Engineering, McGill University, Montreal, Canada

  • Venue:
  • ICCD '11 Proceedings of the 2011 IEEE 29th International Conference on Computer Design
  • Year:
  • 2011

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Abstract

Reversible logic is a key technique for quantum computing so leading to low-power designs. However, current synthesis algorithms for reversible circuits are low efficiency and do not obtain optimized reversible circuits, so they are only applied to small logic functions. In this paper, we propose a new method based on positive Davio expansion to synthesize reversible circuits, which generates a positive Davio decision diagram for a logic function and transfers diagram nodes to reversible circuits. The algorithm has advantages of optimizing area and fast synthesis speed compared to BDD (Binary decision diagram) based and RM (Reed-Muller) based synthesis method, so it can be adapted for large functions.