Cost and performance evaluation of a noise filter for partitioning in co-design methodologies

  • Authors:
  • Victoria Rodellar;Elvira Martínez de Icaya;Francisco Díaz;Virginia Peinado

  • Affiliations:
  • Grupo de Investigación Aplicada a la Señal e Imagen (GIAPSI), Facultad de Informática, Universidad Politécnica de Madrid, Madrid, Spain;Grupo de Investigación Aplicada a la Señal e Imagen (GIAPSI), Facultad de Informática, Universidad Politécnica de Madrid, Madrid, Spain;Grupo de Investigación Aplicada a la Señal e Imagen (GIAPSI), Facultad de Informática, Universidad Politécnica de Madrid, Madrid, Spain;Grupo de Investigación Aplicada a la Señal e Imagen (GIAPSI), Facultad de Informática, Universidad Politécnica de Madrid, Madrid, Spain

  • Venue:
  • ARC'10 Proceedings of the 6th international conference on Reconfigurable Computing: architectures, Tools and Applications
  • Year:
  • 2010

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Abstract

We have studied a Noise Canceller filter to estimate its performance parameters of speed, area and power consumption in different implementations. They have been oriented to find solutions for two kinds of applications: low-power or high speed. The results may be used as inputs to a partitioning algorithm in Co-design methodologies. The algorithm for filter implementation presents a big dispersion in the upper and lower bounds of the variables. The performance dependence by using the same data-format size for all the variables and multiple data-format size adjusted ad hoc for each one of them was evaluated. The results from the Virtex-4 and Stratix II families and TMS320C5510 and TMS320C6416 microprocessors are presented and discussed.