VLSI architecture of the fuzzy fingerprint vault system

Authors:
Sung Jin Lim;Seung-Hoon Chae;Sung Bum Pan
Affiliations:
Dept. of Information and Communication Engineering, Chosun Univ., Gwangju, Korea;Dept. of Information and Communication Engineering, Chosun Univ., Gwangju, Korea;Dept. of Information and Communication Engineering, Chosun Univ., Gwangju, Korea
Venue:
ANNPR'10 Proceedings of the 4th IAPR TC3 conference on Artificial Neural Networks in Pattern Recognition
Year:
2010

Citing 7
Cited 1

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Handbook of Fingerprint Recognition

Handbook of Fingerprint Recognition
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CVPRW '06 Proceedings of the 2006 Conference on Computer Vision and Pattern Recognition Workshop
Protecting Secret Keys with Fuzzy Fingerprint Vault Based on a 3D Geometric Hash Table

ICANNGA '07 Proceedings of the 8th international conference on Adaptive and Natural Computing Algorithms, Part II
Automatic alignment of fingerprint features for fuzzy fingerprint vault

CISC'05 Proceedings of the First SKLOIS conference on Information Security and Cryptology
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AVBPA'05 Proceedings of the 5th international conference on Audio- and Video-Based Biometric Person Authentication

Fuzzy vault for multiple users

AFRICACRYPT'12 Proceedings of the 5th international conference on Cryptology in Africa

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Abstract

User authentication using fingerprint information provides convenience as well as strong security at the same time. However, serious problems may cause if fingerprint information stored for user authentication is used illegally by a different person since it cannot be changed freely as a password due to a limited number of fingers. Recently, research in fuzzy fingerprint vault system has been carried out actively to safely protect fingerprint information in a fingerprint authentication system. In this paper, we propose hardware architecture for a geometric hashing based fuzzy fingerprint vault system. The proposed architecture consists of the software module and hardware module. The hardware module performs the matching for the transformed minutiae in the enrollment and verification hash table. We also propose a hardware architecture which parallel processing technique is applied for high speed processing.