History length adjustable gshare predictor for high-performance embedded processor

  • Authors:
  • Jong Wook Kwak;Seong Tae Jhang;Chu Shik Jhon

  • Affiliations:
  • Department of Electrical Engineering and Computer Science, Seoul National University, Seoul, Korea;Department of Computer Science, The University of Suwon, Suwon, Gyeonggi-do, Korea;Department of Electrical Engineering and Computer Science, Seoul National University, Seoul, Korea

  • Venue:
  • ICCSA'06 Proceedings of the 2006 international conference on Computational Science and Its Applications - Volume Part IV
  • Year:
  • 2006

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Abstract

As modern microprocessros and embedded processors employ deeper pipelines and issue multiple instructions per cycle, accurate branch predictors become an essential part of processor architectures. In this paper, we introduce a history length adjustable gshare predictor for the high-performance embedded processors and show its low-level implementation. Compared to the previous gshare predictor, history length adjustable gshare predictor selectively utilizes the branch history, resulting in substantial improvement in branch prediction accuracy.