High-Speed Digital System Design: A Handbook of Interconnect Theory and Design Practices
High-Speed Digital System Design: A Handbook of Interconnect Theory and Design Practices
The Development of Analog SPICE Behavioral Model Based on IBIS Model
GLS '99 Proceedings of the Ninth Great Lakes Symposium on VLSI
CMOS Circuit Design, Layout, and Simulation, Second Edition
CMOS Circuit Design, Layout, and Simulation, Second Edition
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IBIS (I/O buffer information specification) model is widely used in signal integrity analysis of on-board high-speed digital systems. IBIS model is converted equivalent SPICE behavioral model when used board-level simulations. It is important to represent accurately output buffer's switching characteristics converting IBIS model to SPICE behavioral model. This paper proposes a new modeling algorithm to represent output buffer's switching characteristics in IBIS model. The accuracy of the proposed algorithm has verified through SPICE simulation with other behavioral models.