VLSI implementation of a switch fabric for mixed ATM and IP traffic
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Asynchronous Transfer Mode Networks: Performance Issues,Second Edition
Asynchronous Transfer Mode Networks: Performance Issues,Second Edition
Banyan networks for partitioning multiprocessor systems
ISCA '73 Proceedings of the 1st annual symposium on Computer architecture
SPDP '95 Proceedings of the 7th IEEE Symposium on Parallel and Distributeed Processing
A/I Net: a network that integrates ATM and IP
IEEE Network: The Magazine of Global Internetworking
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This paper focuses on designing a large N X N high-performance Fast Packet switch suitable for mixed ATM and IP traffic It is a Banyan network using cyclic interconnection among switching elements of the same stage We employ deflection-routing algorithm in each switching element The proposed routing is as simple as that of the generic Banyan network, and all the switching elements (SE's) have a uniform structure To design the proposed network and to develop its self-routing property we observe that all the SE's of the Banyan network are arranged in a regular pattern topologically We, thus, present a growable switch architecture based on the topological properties of Banyan Networks As a result, we show that the new network has a far better performance than the other networks.