A parallel array architecture of MIMO feedback network and real time implementation

Authors:
Yong Kim;Hong Jeong
Affiliations:
Department of Electronic and Electrical Engineering, POSTECH, Pohang, Kyungbuk, South Korea;Department of Electronic and Electrical Engineering, POSTECH, Pohang, Kyungbuk, South Korea
Venue:
KES'05 Proceedings of the 9th international conference on Knowledge-Based Intelligent Information and Engineering Systems - Volume Part I
Year:
2005

Citing 3
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Abstract

Blind source separation(BSS) of independent sources from their convolutive mixtures is a problem in many real-world multi-sensor applications. However, the existing BSS solutions are more often than not based upon software and thus not suitable for direct implementation on hardware. In this paper, we present a new FPGA architecture for the blind source separation of a multiple input mutiple output(MIMO) measurement system. The algorithm is based on feedback network and is highly suited for parallel processing. The implementation is designed to operate in real time for speech signal sequences. It is systolic and easily scalable by simple adding and connecting chips or modules. In order to verify the proposed architecture, we have also designed and implemented it in a hardware prototyping with Xilinx FPGAs.