Inter-spike-intervals analysis of poisson like hardware synthetic AER generation

  • Authors:
  • A. Linares-Barranco;M. Oster;D. Cascado;G. Jiménez;A. Civit;B. Linares-Barranco

  • Affiliations:
  • Arquitectura y Tecnología de Computadores, Universidad de Sevilla, Sevilla, Spain;Institute of Neuroinformatics, UNI – ETH Zürich, Zurich, Switzerland;Arquitectura y Tecnología de Computadores, Universidad de Sevilla, Sevilla, Spain;Arquitectura y Tecnología de Computadores, Universidad de Sevilla, Sevilla, Spain;Arquitectura y Tecnología de Computadores, Universidad de Sevilla, Sevilla, Spain;Instituto de Microelectrónica de Sevilla, CSIC, Sevilla, Spain

  • Venue:
  • IWANN'05 Proceedings of the 8th international conference on Artificial Neural Networks: computational Intelligence and Bioinspired Systems
  • Year:
  • 2005

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Abstract

Address-Event-Representation (AER) is a communication protocol for transferring images between chips, originally developed for bio-inspired image processing systems. Such systems may consist of a complicated hierarchical structure with many chips that transmit images among them in real time, while performing some processing (for example, convolutions). In developing AER based systems it is very convenient to have available some kind of means of generating AER streams from on-computer stored images. In this paper we present a hardware method for generating AER streams in real time from a sequence of images stored in a computer's memory. The Kolmogorov-Smirnov test has been applied to quantify that this method follows a Poisson distribution of the spikes. A USB-AER board and a PCI-AER board, developed by our RTCAR group, have been used.