An overview of reconfigurable hardware in embedded systems
EURASIP Journal on Embedded Systems
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This paper presents a framework for Set-top Boxes (STB) with reconfigurable video decoder capability, using the Digital TV (DTV) broadcast signal for the update process. The framework is based on a commercial platform and uses a Field Programmable Gate Array (FPGA) module for the reconfiguration process, where it is expected that a new H.264 video decoder be available. The reconfiguration of the FPGA is performed through a bit stream containing the hardware description (H.264), which is transmitted along with the High Definition Television (HDTV) content. This way, all receivers within the coverage area of the DTV transmitter can be updated with a single signal. Transmission and reception of the update stream are embedded in the proposed framework, whose goal is to minimize the legacy issue (old devices) that arises when deploying a new system. As a result, future revisions in DTV standards could take place without an immediately replacement of reception devices.