On modeling top-down VLSI design

  • Authors:
  • Bernd Schürmann;Joachim Altmeyer;Martin Schütze

  • Affiliations:
  • University of Kaiserslautern, D-67653 Kaiserslautern, Germany;University of Kaiserslautern, D-67653 Kaiserslautern, Germany;University of Kaiserslautern, D-67653 Kaiserslautern, Germany

  • Venue:
  • ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
  • Year:
  • 1994

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Abstract

We present an improved data model that reflects the whole VLSI design process including bottom-up and top-down design phases. The kernel of the model is a static version concept that describes the convergence of a design. The design history which makes the semantics of most other version concepts, is modeled explicitly by additional object classes (entities types) but not by the version graph itself. Top-down steps are modeled by splitting a design object into requirements and realizations. The composition hierarchy is expressed by a simple but powerful configuration method. Design data of iterative refinement processes are managed efficiently by storing incremental data only.