Transactional memory: architectural support for lock-free data structures
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Software transactional memory for dynamic-sized data structures
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Advanced contention management for dynamic software transactional memory
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Toward a theory of transactional contention managers
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McRT-STM: a high performance software transactional memory system for a multi-core runtime
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Subtleties of Transactional Memory Atomicity Semantics
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Software transactional memory for large scale clusters
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DiSTM: A Software Transactional Memory Framework for Clusters
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The semantics of progress in lock-based transactional memory
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Cloud-TM: harnessing the cloud with distributed transactional memories
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Transactional memory is an appealing paradigm for concurrent programming. Many software implementations of the paradigm were proposed in the last decades for both shared memory multi-core systems and clusters of distributed machines. However, chip manufacturers have started producing many-core architectures, with low network-on-chip communication latency and limited support for cache-coherence, rendering existing transactional memory implementations inapplicable. This paper presents TM2C, the first software Transactional Memory protocol for Many-Core systems. TM2C exploits network-on-chip communications to get granted accesses to shared data through efficient message passing. In particular, it allows visible read accesses and hence effective distributed contention management with eager conflict detection. We also propose FairCM, a companion contention manager that ensures starvation-freedom, which we believe is an important property in many-core systems, as well as an implementation of elastic transactions in these settings. Our evaluation on four benchmarks, i.e., a linked list and a hash table data structures as well as a bank and a MapReduce-like applications, indicates better scalability than locks and up to 20-fold speedup (relative to bare sequential code) when running 24 application cores.