Analysing UML Active Classes and Associated State Machines - A Lightweight Formal Approach
FASE '00 Proceedings of the Third Internationsl Conference on Fundamental Approaches to Software Engineering: Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS 2000
An Executable Subset of Meta-IV with Loose Specification
VDM '91 Proceedings of the 4th International Symposium of VDM Europe on Formal Software Development-Volume I: Conference Contributions - Volume I
PVS: A Prototype Verification System
CADE-11 Proceedings of the 11th International Conference on Automated Deduction: Automated Deduction
Validated Designs For Object-oriented Systems
Validated Designs For Object-oriented Systems
Formal Definitions of Simulation Interfaces in a Continuous/Discrete Co-Simulation Tool
RSP '06 Proceedings of the Seventeenth IEEE International Workshop on Rapid System Prototyping
System architecture evaluation using modular performance analysis: a case study
International Journal on Software Tools for Technology Transfer (STTT)
A semantics of communicating reactive objects with timing
International Journal on Software Tools for Technology Transfer (STTT) - Special Section on Specification and Validation of Models of Real Time and Embedded Systems with UML
Co-simulation of distributed embedded real-time control systems
IFM'07 Proceedings of the 6th international conference on Integrated formal methods
Modeling and validating distributed embedded real-time systems with VDM++
FM'06 Proceedings of the 14th international conference on Formal Methods
Concurrency, Compositionality, and Correctness
Models of Rate Restricted Communication for Concurrent Objects
Electronic Notes in Theoretical Computer Science (ENTCS)
A Deterministic Interpreter Simulating A Distributed real time system using VDM
ICFEM'11 Proceedings of the 13th international conference on Formal methods and software engineering
Concurrency, Compositionality, and Correctness
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To support model-based development and analysis of embedded systems, the specification language VDM++ has been extended with asynchronous communication and improved timing primitives. In addition, we have defined an interface for the co-simulation of a VDM++ model with a continuous-time model of its environment. This enables multi-disciplinary design space exploration and continuous validation of design decisions throughout the development process. We present an operational semantics which formalizes the precise meaning of the VDM extensions and the co-simulation concept.