Studying several proposals for the adaptation of the DTable scheduler to advanced switching

  • Authors:
  • Raúl Martínez;Francisco J. Alfaro;José L. Sánchez

  • Affiliations:
  • Departamento de Sistemas Informáticos, Universidad de Castilla-La Mancha, Albacete, Spain;Departamento de Sistemas Informáticos, Universidad de Castilla-La Mancha, Albacete, Spain;Departamento de Sistemas Informáticos, Universidad de Castilla-La Mancha, Albacete, Spain

  • Venue:
  • ISPA'06 Proceedings of the 4th international conference on Parallel and Distributed Processing and Applications
  • Year:
  • 2006

Quantified Score

Hi-index 0.00

Visualization

Abstract

Advanced Switching (AS) is a new fabric-interconnect technology that further enhances the capabilities of PCI Express. On the other hand, the provision of Quality of Service (QoS) in computing and communication environments is currently the focus of much discussion and research in industry and academia. A key component for networks with QoS support is the egress link scheduling algorithm. AS defines a table-based scheduler that is simple to implement and can offer good latency bounds with a fixed packet size. However, it does not work properly with variable packet sizes and faces the problem of bounding the bandwidth and latency assignments. In this paper we propose several possible modifications to the original AS table scheduler in order to implement the Deficit Table (DTable) scheduler. This scheduler works properly with variable packet sizes and allows to partially decouple the bandwidth and latency assignments.