Automated runtime validation of software architecture design

  • Authors:
  • Zhijiang Dong;Yujian Fu;Yue Fu;Xudong He

  • Affiliations:
  • School of Computer Science, Florida International University;School of Computer Science, Florida International University;Technical center, Dogain securities Co., Ltd., China;School of Computer Science, Florida International University

  • Venue:
  • ICDCIT'05 Proceedings of the Second international conference on Distributed Computing and Internet Technology
  • Year:
  • 2005

Quantified Score

Hi-index 0.00

Visualization

Abstract

The benefits of architecture description languages (ADLs) cannot be fully captured without a automated and validated realization of software architecture designs. In addition to the automated realization of software architecture designs, we validate the realization process by exploring the runtime verification technique and aspect-oriented programming. More specifically, system properties are not only verified against design models, but also verified during execution of the generated implementation of software architecture designs. All these can be done in an automated way. In this paper, we show that our methodology of automated realization of software architecture designs and validation of the implementation is viable through a case study.