SVERTS: specification and validation of real-time and embedded systems

Authors:
Susanne Graf;Øystein Haugen;Ileana Ober;Bran Selic
Affiliations:
VERIMAG, Grenoble, France;University of Oslo, Oslo, Norway;VERIMAG, Grenoble, France;IBM, Canada
Venue:
UML'04 Proceedings of the 2004 international conference on UML Modeling Languages and Applications
Year:
2004

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Abstract

This paper presents an overview on the workshop on Specification and Validation of Real-time and embedded Systems that has taken place for the second time in association with the UML 2004 conference. The main themes discussed at this year’s workshop concerned modeling of real-time features with the perspective of validation as well as some particular validation issues.