A novel approach to modechart verification of real-time systems

Authors:
Jan Fiedor;Marek Gach;Milan Č/e$#353/ka
Affiliations:
FIT, Brno University of Technology, Brno, Czech Republic;FIT, Brno University of Technology, Brno, Czech Republic;FIT, Brno University of Technology, Brno, Czech Republic
Venue:
EUROCAST'11 Proceedings of the 13th international conference on Computer Aided Systems Theory - Volume Part I
Year:
2011

Citing 10
Cited 0

Safety analysis of timing properties in real-time systems

IEEE Transactions on Software Engineering - Special issue on reliability and safety in real-time process control
A graph-theoretic approach for timing analysis and its implementation

IEEE Transactions on Computers - Special Issue on Real-Time Systems
Statecharts: A visual formalism for complex systems

Science of Computer Programming
Semantics of Modechart in real time logic

Proceedings of the Twenty-First Annual Hawaii International Conference on Software Track
Modechart: A Specification Language for Real-Time Systems

IEEE Transactions on Software Engineering
Symbolic model checking for event-driven real-time systems

ACM Transactions on Programming Languages and Systems (TOPLAS)
A new generation modechart verifier

RTAS '95 Proceedings of the Real-Time Technology and Applications Symposium
Real-Time Systems: Scheduling, Analysis, and Verification

Real-Time Systems: Scheduling, Analysis, and Verification
A Solution to the Generalized Railroad Crossing Problem in ESTEREL

A Solution to the Generalized Railroad Crossing Problem in ESTEREL
An Operational Semantics and a Compiler for Modechart Specificiations

An Operational Semantics and a Compiler for Modechart Specificiations

Quantified Score

Hi-index	0.00

Visualization

Abstract

Because real-time systems are often time-critical applications and their failure can have fatal consequences, it is important to ensure their correct behaviour. There exist many approaches for verification of real-time systems. Some use graphical formalisms, other various kinds of logics, to describe the system being verified. While graphical description can be significantly easier to use, it disallows to utilise many powerful methods for analysis and verification. In this paper, we propose a new approach for verification of real-time systems described by the Modechart graphical formalism by transforming the computation of the system onto a set of restricted real-time logic (RRTL) formulae. Moreover, if the verified property is known in advance, we are able to reduce the number of resulting RRTL formulae.