Loop tiling for parallelism
Exploiting Wavefront Parallelism on Large-Scale Shared-Memory Multiprocessors
IEEE Transactions on Parallel and Distributed Systems
CellSs: a programming model for the cell BE architecture
Proceedings of the 2006 ACM/IEEE conference on Supercomputing
Finite Difference Time Domain (FDTD) Simulations Using Graphics Processors
HPCMP-UGC '07 Proceedings of the 2007 DoD High Performance Computing Modernization Program Users Group Conference
Stencil computation optimization and auto-tuning on state-of-the-art multicore architectures
Proceedings of the 2008 ACM/IEEE conference on Supercomputing
Hybrid access-specific software cache techniques for the cell BE architecture
Proceedings of the 17th international conference on Parallel architectures and compilation techniques
Introducing the semi-stencil algorithm
PPAM'09 Proceedings of the 8th international conference on Parallel processing and applied mathematics: Part I
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The Finite Difference Time Domain (FDTD) method enables computerized simulation of the electromagnetic wave propagation. We propose a streaming model for FDTD computations oriented towards a multicore processor architecture. FDTD computations are characterized by injection of small portions of data into computational nodes, processing them and returning the results into main storage. We can parallelize FDTD computations by combining the loop tiling approach and a communication mechanism based on a rotating buffers infrastructure. The described FDTD algorithm has been implemented using both of these techniques on a streaming architecture of the Cell/BE processor. The efficiency of FDTD computations has been estimated for different parameters of the assumed loop tiling algorithm and the rotating buffers mechanism.