Towards efficient execution of erasure codes on multicore architectures

Authors:
Roman Wyrzykowski;Lukasz Kuczynski;Marcin Wozniak
Affiliations:
Institute of Computer and Information Sciences, Czestochowa University of Technology, Czestochowa, Poland;Institute of Computer and Information Sciences, Czestochowa University of Technology, Czestochowa, Poland;Institute of Computer and Information Sciences, Czestochowa University of Technology, Czestochowa, Poland
Venue:
PARA'10 Proceedings of the 10th international conference on Applied Parallel and Scientific Computing - Volume 2
Year:
2010

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Abstract

Erasure codes can improve the availability of distributed storage in comparison with replication systems. In this paper, we focus on investigating how to map systematically the Reed-Solomon and Cauchy Reed-Solomon erasure codes onto the Cell/B.E. and GPU multicore architecture. A method for the systematic mapping of computation kernels of encoding/decoding algorithms onto the Cell/B.E. architecture is proposed. This method takes into account properties of the architecture on all three levels of its parallel processing hierarchy. The performance results are shown to be very promising. The possibility of using GPUs is studied as well, based on the Cauchy version of Reed-Solomon codes.