FPGA implementation of two involutional block ciphers targeted to wireless sensor networks

  • Authors:

  • Xueying Zhang;H. M. Heys;Cheng Li

  • Affiliations:

  • Electrical and Computer Engineering, Memorial University, St. John's, NL, A1B 3X5, Canada;Electrical and Computer Engineering, Memorial University, St. John's, NL, A1B 3X5, Canada;Electrical and Computer Engineering, Memorial University, St. John's, NL, A1B 3X5, Canada

  • Venue:
  • CHINACOM '11 Proceedings of the 2011 6th International ICST Conference on Communications and Networking in China
  • Year:
  • 2011

Quantified Score

Hi-index 0.00

Visualization

Abstract

In this paper, we investigate the energy cost of the FPGA implementation of two cryptographic algorithms targeted to wireless sensor networks (WSNs). Recent trends have seen the emergence of WSNs using sensor nodes based on reconfigurable hardware, such as a field-programmable gate arrays (FPGAs), thereby providing flexible functionality with higher performance than classical microcontroller based sensor nodes. In our study, we investigate the hardware implementation of involutional block ciphers since the characteristics of involution enables performing encryption and decryption using the same circuit. This characteristic is particularly appropriate for a wireless sensor node which requires the function of both encryption and decryption. Further, in order to consider the suitability of a cipher for application to a wireless sensor node, which is an energy constrained device, it is most critical to consider the cost of encryption in terms of energy consumption. Hence, we choose two involutional block ciphers, KHAZAD and BSPN, and analyze their energy efficiency for FPGA implementation.