Architecture and FPGA design of dichotomous coordinate descent algorithms
IEEE Transactions on Circuits and Systems Part I: Regular Papers
FPGA implementation of RLS adaptive filter using dichotomous coordinate descent iterations
ICC'09 Proceedings of the 2009 IEEE international conference on Communications
Online adaptive estimation of sparse signals: where RLS meets the l1-norm
IEEE Transactions on Signal Processing
Low-complexity adaptive decision-feedback equalization of MIMO channels
Signal Processing
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In this paper, we derive low-complexity recursive least squares (RLS) adaptive filtering algorithms. We express the RLS problem in terms of auxiliary normal equations with respect to increments of the filter weights and apply this approach to the exponentially weighted and sliding window cases to derive new RLS techniques. For solving the auxiliary equations, line search methods are used. We first consider conjugate gradient iterations with a complexity of operations per sample; being the number of the filter weights. To reduce the complexity and make the algorithms more suitable for finite precision implementation, we propose a new dichotomous coordinate descent (DCD) algorithm and apply it to the auxiliary equations. This results in a transversal RLS adaptive filter with complexity as low as multiplications per sample, which is only slightly higher than the complexity of the least mean squares (LMS) algorithm ( multiplications). Simulations are used to compare the performance of the proposed algorithms against the classical RLS and known advanced adaptive algorithms. Fixed-point FPGA implementation of the proposed DCD-based RLS algorithm is also discussed and results of such implementation are presented.