Efficient Implementation of Rotation Operations for High Performance QRD-RLS Filtering
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
Systolic Algorithms and Architectures for High-Throughput Processing Applications
Journal of Signal Processing Systems
A unified co-processor architecture for matrix decomposition
Journal of Computer Science and Technology
| Hi-index | 35.68 |
Classical systolic design procedures rely on linear or affine space-time transformations because of the well-understood properties of linear operations. In order to increase the efficiency of the final processor, various ad hoc manipulations applied to transformations that appeared to be nonlinear at the physical array level have been proposed. Folding is one of these possible transformations. The authors show that folding can actually be considered to be an overall linear procedure by artificially increasing the dimensionality of the dependence graph of the algorithm. A 1-D array for recursive least squares is also derived as an application of a systematic linear design procedure including folding