The effectiveness of multiple hardware contexts

  • Authors:

  • Radhika Thekkath;Susan J. Eggers

  • Affiliations:

  • Department of Computer Science and Engineering, FR-35, University of Washington, Seattle, WA;Department of Computer Science and Engineering, FR-35, University of Washington, Seattle, WA

  • Venue:
  • ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
  • Year:
  • 1994

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Abstract

Multithreaded processors are used to tolerate long memory latencies. By executing threads loaded in multiple hardware contexts, an otherwise idle processor can keep busy, thus increasing its utilization. However, the larger size of a multi-thread working set can have a negative effect on cache conflict misses. In this paper we evaluate the two phenomena together, examining their combined effect on execution time.The usefulness of multiple hardware contexts depends on: program data locality, cache organization and degree of multiprocessing. Multiple hardware contexts are most effective on programs that have been optimized for data locality. For these programs, execution time dropped with increasing contexts, over widely varying architectures. With unoptimized applications, multiple contexts had limited value. The best performance was seen with only two contexts, and only on uniprocessors and small multiprocessors. The behavior of the unoptimized applications changed more noticeably with variations in cache associativity and cache hierarchy, unlike the optimized programs.As a mechanism for exploiting program parallelism, an additional processor is clearly better than another context. However, there were many configurations for which the addition of a few hardware contexts brought as much or greater performance than a larger multiprocessor with fewer than the optimal number of contexts.