Performance and energy models for memristor-based 1T1R RRAM cell

Authors:
Mahmoud Zangeneh;Ajay Joshi
Affiliations:
Boston University, Boston, MA, USA;Boston University, Boston, USA
Venue:
Proceedings of the great lakes symposium on VLSI
Year:
2012

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Abstract

Sustaining the trend of lowering energy dissipation and read/write access time and increasing density in CMOS-based memory arrays is becoming extremely challenging with each new technology generation. Hence, alternate technologies that can supplant CMOS technology need to be explored. Memristor-based resistive memory with its scaling potential and endurance is one of the viable replacements to CMOS. This paper presents accurate analytical models for the performance and the energy dissipation of a 1-transistor 1-memristor (1T1R) resistive random access memory (RRAM) cell structure. We have verified our models against detailed HSPICE simulations and our models show that the time required to write logic one into the cell is typically 30% larger than the time required to write logic zero and is in the order of ns. Unlike the access time, the energy dissipation of the cell is the same for writing logic one and logic zero (less than 350 fJ/bit). The energy dissipated while reading is roughly 120 fJ/bit which is 65% less than the energy of writing.