A system for incremental synthesis to gate-level and reoptimization following RTL design changes

  • Authors:
  • S. C. Prasad;P. Anirudhan;P. Bosshart

  • Affiliations:
  • Integrated Systems Laboratory, Texas Instruments Incorporated, P.O.Box 655474, M.S. 446, Dallas, Texas;Integrated Systems Laboratory, Texas Instruments Incorporated, P.O.Box 655474, M.S. 446, Dallas, Texas;Integrated Systems Laboratory, Texas Instruments Incorporated, P.O.Box 655474, M.S. 446, Dallas, Texas

  • Venue:
  • DAC '94 Proceedings of the 31st annual Design Automation Conference
  • Year:
  • 1994

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Abstract