IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Recent research has shown that single carrier frequency domain equalization (SC-FDE) is an attractive technology for broadband wireless communications for its advantages such as lower peak-to-average power ratio and reduced sensitivity to carrier frequency offset, when compared to orthogonal frequency-division multiplexing (OFDM) systems. In this paper, we propose a novel structure, FDE-NP, which consists of a linear frequency domain equalizer (FDE) and a time domain noise predictor (NP). It is shown that the proposed scheme has lower complexity and achieves better performance and complexity trade-off than the conventional FDE designs. In particular, by using a simple block interleaver/deinterleaver pair to rearrange the order of the received signals prior to decoding, delayed reliable decisions can be fed back to predict and cancel their post-cursor inter-symbol interference (ISI) effects to the following signals. Simulation results show that the proposed FDE-NP scheme achieves 1.5-2 dB performance improvement over the conventional FD-LE and FD-DFE schemes. Furthermore, we extend the design of unbiased and biased time domain equalizers (TDEs) into the frequency domain and propose the unbiased FDE. It is shown that although the unbiased FDE has a larger MSE than the biased one, it reduces the required SNR by about 0.3 dB in some cases