An efficient rearrangement of wavelet packet coefficients for embedded quad-tree image coding
MUSP'07 Proceedings of the 7th WSEAS International Conference on Multimedia Systems & Signal Processing
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Adaptive Selection and Rearrangement of Wavelet Packets for Quad-Tree Image Coding
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
A simple rate distortion estimation for embedded block coding
MUSP'09 Proceedings of the 9th WSEAS international conference on Multimedia systems & signal processing
Context-based rate distortion estimation and its application to wavelet image coding
WSEAS Transactions on Information Science and Applications
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An 81 MSamples/s JPEG 2000 single-chip encoder is implemented on 5.5 mm2 area using 0.25-mum CMOS technology. This IC can losslessly encode HDTV 720p resolution at 30 frames/s in real time. Three techniques are adopted: line-based discrete wavelet transform, parallel embedded block coding, and precompression rate-distortion optimization. The line-based discrete wavelet transform achieves the minimum external memory access, while the internal memory is reduced by a proper memory access scheme. The parallel embedded block coding increases the throughput and reduces the memory bandwidth with similar hardware cost comparing to conventional architectures. By accurately estimating bit rates, the precompression rate-distortion optimization reduces the required computational power and processing time of the embedded block coding since the code-blocks are truncated before compression. Experimental results show that this encoder has the highest throughput with the smallest area compared with other designs in the literature