An Analysis of Cache Performance of Multimedia Applications
IEEE Transactions on Computers
Reducing off-chip memory access costs using data recomputation in embedded chip multi-processors
Proceedings of the 44th annual Design Automation Conference
Memory Analysis of Low Power MPEG-4 Decoder Architecture
ICESS '09 Proceedings of the 2009 International Conference on Embedded Software and Systems
Analysis of memory access optimization for motion compensation frames in MPEG-4
SOC'09 Proceedings of the 11th international conference on System-on-chip
Observations on power-efficiency trends in mobile communication devices
SAMOS'05 Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
Memory reduction by Haar wavelet transform for MPEG decoder
IEEE Transactions on Consumer Electronics
Combined Frame Memory Motion Compensation for Video Coding
IEEE Transactions on Circuits and Systems for Video Technology
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One of the main sources for energy consumption in modern video coding algorithms is caused by reading reference frames from main memory. Once a reference frame block is in the local memory, we need to predict in advance when the same reference frame block would be reread from the main memory. The prediction relies on the calculation of motion vectors according to their absolute addresses. The reduction of the number of read accesses can be attained by calculating which motion vectors point to a part of the reference frame that can be copied to a local memory. This increases data locality, and thus reduces energy consumption. The optimized memory access algorithm was integrated into low power MPEG-4 decoder architecture [1, 2] and modeled using SystemC. A cycle accurate model simulation with optimized algorithm showed an average of 10% increase on runtime performance compared to an unoptimized typical video decoding algorithm.