Ultra low power associative computing with spin neurons and resistive crossbar memory
Proceedings of the 50th Annual Design Automation Conference
Exploring Boolean and non-Boolean computing with spin torque devices
Proceedings of the International Conference on Computer-Aided Design
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We model a step transfer function neuron with lateral spin valve (LSV) and propose its application in low power neural network hardware. The computational task in such a network is performed by nano-magnets, metal channels and programmable conductive elements, that constitute the neuron-synapse units and operate at a terminal voltage of ~20 mV. CMOS transistors provide peripheral support in the form of clocking, power gating and inter-neuron signaling. Simulations for cognitive as well as Boolean computation applications show more than 94% improvement in power consumption as compared to a conventional CMOS design at the same technology node.