Design and implementation of an efficient integer count sort in CUDA GPUs

  • Authors:
  • Vasileios Kolonias;Artemios G. Voyiatzis;George Goulas;Efthymios Housos

  • Affiliations:
  • Computer Systems Laboratory, Department of Electrical and Computer Engineering, University of Patras, GR-26504, Patras, Greece;Industrial Systems Institute/RC ‘Athena’, GR-26504 Platani, Patras, Greece;Computer Systems Laboratory, Department of Electrical and Computer Engineering, University of Patras, GR-26504, Patras, Greece;Computer Systems Laboratory, Department of Electrical and Computer Engineering, University of Patras, GR-26504, Patras, Greece

  • Venue:
  • Concurrency and Computation: Practice & Experience
  • Year:
  • 2011

Quantified Score

Hi-index 0.00

Visualization

Abstract

We describe experience on design and implementation of an efficient count sort algorithm on Compute Unified Device Architecture graphics processing units. The novelty of this work is twofold. At first, we propose a count sort algorithm for integers that needs no synchronization at its last step and thus, offers superior performance. At second, this work contributes ad hoc techniques for optimizing the performance of the algorithm on Compute Unified Device Architecture-enabled graphics processing units. Copyright © 2011 John Wiley & Sons, Ltd.