Analysis of signal probability in logic circuits using stochastic models

  • Authors:
  • A. Majumdar;S. B.K. Vrudhula

  • Affiliations:
  • Dept. of Electr. Eng., Southern Illinois Univ., Carbondale, IL, USA;-

  • Venue:
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • Year:
  • 1993

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Abstract

Analyzes the behavior of signal probabilities in logic circuits chosen from a statistically characterized population. The statistical parameters of the population are obtained from certain aggregate structural and logical characteristics of the circuit such as fanins, fanouts, and proportions of different types of gates. A circuit is first transformed into one consisting of only nand gates, inverters, and buffers. This transformation leads to a new classification of circuits, referred to as nor-type, or-type, nand-type and and-type, the particular type being determined by computing two parameters from the circuit specification. A functional relation between gate signal probabilities, primary input signal probabilities, and aggregate structural properties of a circuit is established. This allows the study of basic characteristics of signal probability and its limiting behavior when the number of levels increases. It is shown that the limiting behavior of signal probability depends on the fixed points of a function which is determined by the two parameters estimated from the circuit and the distribution of gate fanins. A recurrence relation also allows one to define a methodology for estimating the distribution of signal probabilities in different levels. The complexity of this technique is shown to be proportional to the number of levels in the circuit. Results of extensive experiments with ISCAS '85 benchmarks as well as other circuits are given.